To keep it short: That will be no problem.
Side story: There are many rumors about SR-Flipflops which are not true. Consider a typical implementation by two NOR gates:
next(p) = !(s | q)
next(q) = !(r | p)This leads to the following cases for the four possible inputs if these are kept stable:
- s=0 & r=0 : (next(p) = !q) & (next(q) = !p)
- s=0 & r=1 : (next(p) = !q) & (next(q) = 0) and thus (p =1) & (q = 0) after two steps
- s=1 & r=0 : (next(p) = 0) & (next(q) = !p) and thus (p =0) & (q = 1) after two steps
- s=1 & r=1 : (next(p) = 0) & (next(q) = 0)
Hence, you can see that s=1&r=1 do not lead to unstable outputs as often stated, but they violate the invariant that we want that q=!p. That is established by one of the inputs s=0&r=1 or s=1&r=0 and kept invariant by s=0&r=0. However, if we would have once the input s=1&r=1 which makes p=q=0, then the input s=0&r=0 would lead to an unstable state where p and q will oscillate.
You can look at is also from the perspective of the states
- p=0 & q=0 : (next(p) = !s) & (next(q) = !r), i.e. all four states are reachable from here
- p=0 & q=1 : (next(p) = 0) & (next(q) = !r), i.e. with r=1 we switch to p=q=0 and otherwise remain in p=0 & q=1
- p=1 & q=0 : (next(p) = !s) & (next(q) = 0), i.e. with s=1 we switch to p=q=0 and otherwise remain in p=1 & q=0
- p=1 & q=1 : (next(p) = 0) & (next(q) = 0), i.e. we switch to p=q=0
As you can see, it is unavoidable to go through state p=q=0.
Having written way too much, let me emphasize here finally, that all of this is not relevant for the exam tomorrow. I don't want to create the impression that this is maybe something you should look at in detail. Please don't waste your time!
