Full predication means that all instructions are endowed with an additional predicate register. For instance, and addition instruction like add rd,rl,rr becomes [p]add rd,rl,rr and means that the predicate register p is checked before further executing the instruction: If the content of the predicate register p is true, the addition is executed as usual, otherwise, it is simply skipped.
The predicate registers are typically assigned by comparison operations and logical operations whose results are boolean values. Even these instructions may have predicate registers, so that there must also be at least some unpredicted instructions to assign constants "true" or "false" to a predicate register.
Full predication needs to add additional source operands to *essentially all* instructions and is therefore quite expensive: the programs become larger and the processors have to access all the time the predicate registers.
To reduces these costs, one may alternatively use partial predication which means that *not all, but only a few* instructions are predicated. In essence, it is sufficient to implement an if-then-else expression that executes rd := (p?rl:rr) where the right hand side means "if p then rl else rr" or even less a conditional move instruction like [p] mov rd,r which means that rd:=r is executed if p holds, and otherwise, nothing is executed.
For an if-statement, you may this way, simply execute the then and else branch and assign finally only those values to the live variables that remain after the statement.
Conditional move instructions are not load/store instructions. The conditional move instruction "cmov rd, rl, rr " suggested in the excerise copies the value of register rr to rl if rd hold, and otherwise does nothing.
In the exercise, you should translation the given program to assembly code using either full or partial predication with the above instructions. For instance, consider the following statement
if(x<y) {
y = x+y;
} else {
y = x-y;
}
Using full predication, you may write the following program:
sgt p1,rx,ry
neg p0,p1
[p1] add ry,rx,ry
[p0] sub ry,rx,ry
Using partial predication, you may write the following program:
sgt p1,rx,ry
neg p0,p1
add r1,rx,ry
sub r0,rx,ry
cmov p1,ry,r1
cmov p0,ry,r0 Hope this helps!
